Added gensym, and phases in the desugar module for logical and & or

2025-12-27 16:41:22 +03:00
parent be85a9a6ed
commit cd8337b650
3 changed files with 58 additions and 2 deletions
--- a/lib/compiler/gensym.ml
+++ b/lib/compiler/gensym.ml
@@ -0,0 +1,8 @@
+
+
+let counter = ref 0
+
+let reset () = counter := 0
+let gensym base =
+  incr counter;
+  Printf.sprintf "__generated_%s_%d" base !counter